EC-25.1 Variability, Yield, and What a Process Actually Delivers
You can distinguish systematic from random variation and say where each comes from in the process, relate defect density and die area to yield, and explain why yield rather than performance decides whether a product makes money.
Before:PE1-1. VLSI TechnologyEC-8. Measurements, Instrumentation and Experimental MethodEC-21. Hardware Verification, FPGA and SoC Design
Two transistors drawn identically and made on the same wafer are not identical, and everything in manufacturing follows from that. Some of the difference is systematic and can be modelled and compensated; some is atomic and cannot. Yield is the fraction of manufactured parts that are worth selling, and for most products it is the single number the business runs on, which is why a design that improves yield beats one that improves speed.
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Where variation comes from: lithography, implantation and random dopant placement
Each process step contributes its own spread, and at small dimensions the number of dopant atoms in a channel is small enough that counting statistics matter. Knowing which step dominates points at what can be improved.
NPTEL: Basic Overview of Semiconductor Device Processing and IC Fabrication (IIT Kanpur) · CourseSystematic against random variation, and why only one can be designed around
A gradient across a wafer can be modelled and compensated, while an atomic-scale fluctuation between neighbouring devices cannot. Matched pairs placed close together exist precisely because of that distinction.
NPTEL: Semiconductor Device Modeling and Simulation (IIT Kharagpur) · CourseProcess corners and Monte Carlo, and what each kind of simulation answers
Corner simulation asks whether the design survives the extremes and statistical simulation asks how many parts will fall outside the specification. They answer different questions and neither replaces the other.
NPTEL: Semiconductor Device Modeling and Simulation (IIT Kharagpur) · CourseDefect density, die area and the yield that follows
Given a defect density, the probability of a die being free of defects falls quickly with its area, which is why large chips are expensive out of proportion to their size. The relationship is simple enough to compute by hand.
NPTEL: Digital VLSI Testing (IIT Kharagpur) · CourseRedundancy and repair, especially in memories
Spare rows and columns that can be substituted after test turn many defective memory dies into sellable ones. It is the clearest example of a design decision made purely to raise yield.
Binning: selling the same die at several speeds
Parts that fail the fastest specification often pass a slower one and are sold as a different product. That practice is why a product family can share one design and one mask set.
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