EC-25.4 Packaging: Electrical, Thermal and Mechanical

What this is and why it exists

A package is not a lid.

It carries every signal and every ampere into and out of the die. It removes the heat. And it holds together while everything inside expands at different rates through every temperature cycle of its life.

For fast parts the package inductance limits performance more than the transistors do. For power parts the thermal path decides the rating. This topic treats packaging as the three-way design problem it actually is.

The vocabulary

• Wire bond — a fine wire connecting a die pad to a package lead.
• Flip-chip — attaching the die face down onto solder bumps.
• Lead inductance — the series inductance a package adds to each connection.
• Ground bounce — the internal supply moving relative to the external one.
• Simultaneous switching — many outputs changing at once, drawing a large current step.
• Thermal resistance — the temperature rise per watt from junction to ambient.
• Coefficient of expansion — how much a material grows per degree.
• Underfill — material placed under a flip-chip die to share mechanical stress.
• Floor life — how long a part may sit outside its sealed bag before soldering.

The mental model

A package has four jobs that pull against each other: connect, cool, protect and support. Each package family is a different compromise between them at a different price. Recognising that there is no best package, only a best package for a given requirement, is the starting point.

The connection choice matters most electrically. A wire bond adds a few nanohenries of series inductance to every connection, and the wires must reach from the die edge to the leads. A flip-chip bump is a fraction of that inductance and can be placed anywhere on the die face, including in the middle. For a fast supply pin, that difference decides the achievable performance.

Ground bounce is what the inductance does. When many outputs switch at once, a large current step flows through the supply and ground inductance. The internal supply then moves relative to the external one. Signals referenced to it are corrupted. That is why fast parts have many supply and ground pins in parallel: parallel inductances are lower.

The thermal path runs junction to case to board to air. The package sets the first part of it, and the figure published in the data sheet assumes a specific board and a specific airflow. Using it without those assumptions gives an answer that is optimistic, sometimes by a factor of two.

Expansion mismatch is the main mechanical hazard. Silicon, mould compound, solder and the board all grow at different rates. Every temperature change therefore works every joint between them, and most package reliability failures are that stress accumulated over thousands of cycles. Underfill under a flip-chip die exists to spread it.

Finally, moisture. Packages absorb it from the air, and during soldering it turns to steam and can crack the package from inside. The floor-life rating on the sealed bag is a real constraint on how a factory handles the parts.

What you should now be able to explain or do

• Name the four things a package must do and say why they conflict.
• Compare wire bonding and flip-chip on inductance and on thermal path.
• Explain ground bounce and why supply pins are duplicated.
• Read a package thermal resistance figure and state its assumptions.
• Explain why expansion mismatch causes most package reliability failures.
• Say what floor life means and why a factory must respect it.

Check yourself