PE2-1.3 Differential Amplifiers & Op-Amps

What this is and why it exists

A chip is a noisy place. Supply rails move, digital circuits switch, and the substrate carries all of it into every analog circuit on the die.

Differential signalling is the answer, and it is the most important structural choice in analog integrated design. A disturbance that appears equally on two wires cancels when you take their difference. A single-ended circuit has no way to do that.

The vocabulary

• Differential pair — two matched transistors sharing one tail current source.
• Common mode — the part of a signal that is the same on both inputs.
• Differential mode — the part that differs between them.
• Tail current — the fixed current the pair shares between its two sides.
• Active load — a transistor load, here often a mirror converting the pair's output to one wire.
• Frequency compensation — deliberately reshaping the response so feedback stays stable.
• Pole splitting — moving two poles apart, one lower and one higher, to gain stability.
• Nulling resistor — a resistor in series with the compensation capacitor, removing a troublesome zero.
• Common mode feedback — an extra loop holding a fully differential output at the right level.
• Slew rate — the fastest the output can move, set by a current charging a capacitance.

The mental model

The differential pair is two matched devices sharing one tail current. Raise one input relative to the other and the tail current shifts towards that side. The total stays constant, and it is the difference in the two currents that carries the signal.

The cancellation is what matters. Move both inputs together and the pair barely responds, because the tail current has nowhere else to go. Move them apart and it responds fully. Noise on the supply or the substrate tends to appear on both, so it lands in the part the circuit ignores.

Analyse that pair once properly. The operational amplifiers below are assemblies of it.

A one stage amplifier is the pair with an active load, usually a mirror that turns the two-sided output into one. It is simple, it is fast, and its output swing is limited because several devices are stacked between the rails.

A two stage amplifier adds a common source stage after it. That buys more gain and much better output swing, and it is what most designs use. It also creates a problem, because now there are two high-impedance nodes, each with its own capacitance, so the amplifier has two poles close together.

That is the stability problem, and compensating it is the hardest and most valuable content in the topic.

The issue is feedback. An amplifier used with feedback subtracts its output from its input. If the amplifier delays the signal enough that the subtraction becomes an addition while the gain is still above one, the circuit oscillates. Two poles close together produce exactly that much phase shift.

The fix is deliberate and initially counter-intuitive. You slow the amplifier down on purpose. A capacitor is connected across the second stage, and because that stage has gain the Miller effect makes it look far larger at its input. The first pole drops to a much lower frequency. At the same time the feedback through that capacitor lowers the second stage's output impedance, pushing the second pole higher. The two poles move apart, which is pole splitting, and the amplifier is stable long before the second pole matters.

One nuisance remains. The compensation capacitor also creates a path straight from input to output, bypassing the transistor. That produces a zero in the wrong half-plane, which hurts stability. A resistor in series with the capacitor cancels that path. That is the nulling resistor, and it is the standard answer.

Common mode feedback is the loop people forget. A fully differential amplifier controls the difference between its outputs and says nothing about their average. Left alone that average drifts to a rail. An extra loop senses it and corrects it. It is quietly omitted from many schematics and it is fatal on silicon, so look for it deliberately.

Input range is a growing constraint. The pair needs enough voltage above its tail source and below its load to keep every device in saturation. As supply voltages shrink, that band narrows.

Slew rate returns here, and here it becomes designable rather than a datasheet number. When the input step is large, the pair sends its entire tail current to one side, and that current has to charge the compensation capacitor. The output can then move no faster than that current divided by that capacitance. So slew rate is set by the tail current and the compensation capacitor, and both are yours to choose.

What you should now be able to explain or do

Say why differential signalling is the structural choice of analog integrated design. Analyse the differential pair and separate common mode from differential mode behaviour. Say what the second stage buys and what it costs. Explain Miller compensation as pole splitting, and what the nulling resistor removes. Explain common mode feedback and derive slew rate from the tail current and the compensation capacitor.

Check yourself