PE2-1.2 Single Stage Amplifiers & Current Mirrors

Standard CMOS analog and digital design theory — written September 2026

What this is and why it exists

Every analog integrated circuit is assembled from a small number of stages. This topic is the catalogue, and the way to learn it is not as circuits to recognise.

Learn each stage by three things. What its gain is, what its input and output impedances are, and what it is for. Then a schematic you have never seen becomes a sequence of stages you know.

The vocabulary

  • Common source stage — input at the gate, output at the drain. The main gain stage.
  • Active load — a transistor used as a load instead of a resistor.
  • Diode load — a transistor with its gate tied to its drain, behaving somewhat like a resistor set by the device.
  • Source degeneration — a resistor in the source, trading gain for linearity.
  • Source follower — output taken at the source. Gain near one, low output impedance.
  • Common gate stage — input at the source, output at the drain. Low input impedance.
  • Cascode — a common source stage with a common gate stage stacked on top.
  • Folded cascode — the same idea arranged to use less voltage headroom.
  • Headroom — the voltage left over for signal swing after every device is kept in saturation.
  • Current mirror — a circuit that copies a reference current elsewhere on the chip.
  • Miller effect — a capacitance between input and output appearing at the input multiplied by the gain.

The mental model

Name the trade-offs before the catalogue, or the eight stages become a list to memorise. Gain, bandwidth, output swing, noise and power all pull against each other. Every stage below is a different point in that space.

The common source stage is the workhorse. Its gain is the transconductance times whatever resistance is at the drain, so the load choice is the first real decision.

A resistor load is predictable and gives modest gain, because a large resistor drops a large voltage and leaves no headroom. A current source load has very high resistance and drops almost nothing, so the gain is far larger. It also makes the operating point delicate, because two nearly ideal current sources in series must be told what voltage to sit at.

A diode load sets the gain by a ratio of device sizes rather than by absolute values. That is far more robust against process variation, and it buys robustness with gain.

Source degeneration adds a resistor at the source. Any rise in current raises the source voltage, which reduces the gate-to-source drive and pushes back. That is negative feedback, and it trades gain for linearity and predictability.

The source follower is the buffer. Its gain is near one and its output impedance is low, so it drives a load without the previous stage having to. Body effect degrades it, which is a good example of a second order effect mattering in practice rather than in a footnote.

The common gate stage has low input impedance and, importantly, no Miller effect, because its input and output are not coupled by the gate capacitance. That property is what makes the next structure work.

The cascode stacks a common gate stage on top of a common source stage. The output resistance rises enormously, so the gain does too. The common gate device also shields the lower one, so its drain voltage barely moves and the Miller effect largely disappears. The cost is headroom: two devices in series both need enough voltage to stay in saturation. As supply voltages fall, that cost grows, and the folded arrangement exists to buy the headroom back by routing the signal through a different path.

Current mirrors replace resistors for setting bias. The reason is a fabrication fact. Accurate absolute resistor values are hard to make on a chip, and closely matched transistors are not. So a reference current is forced through one device, and any device sharing its gate voltage and geometry carries a copy. Matching is the whole game, and it is a layout problem as much as a circuit one.

The cascode mirror applies the stacking idea to improve accuracy, because the copy then becomes far less sensitive to the output voltage. It costs headroom, which is the recurring trade of this topic.

Frequency response closes it. The capacitance between gate and drain sits across the amplifying stage. The Miller effect makes it appear at the input multiplied by one plus the gain. A few femtofarads behave like far more, and that is why a simple stage is slower than its device capacitances suggest.

What you should now be able to explain or do

State the trade-offs that organise the whole catalogue. Compare resistive, current source and diode loads on gain, headroom and robustness. Explain source degeneration as feedback. Say why a cascode raises gain and what it costs. Explain why current mirrors are used instead of resistors, and how the Miller effect slows a common source stage.

Check yourself

Gain is transconductance times drain resistance. A current source has very high resistance while dropping almost no voltage, so it gives both gain and headroom.

Gain. In return the stage becomes more linear and its behaviour depends less on device parameters.

The stacked common gate device multiplies the output resistance. Gain is proportional to that resistance.

Matched transistors fabricate well and accurate absolute resistances do not. Bias is therefore distributed as copied currents.

It makes the gate-to-drain capacitance appear at the input multiplied by one plus the gain, so the stage is far slower than that capacitance suggests.

Go deeper

Back to Single Stage Amplifiers & Current Mirrors: work through the checklist