S4-4.2 Combinational Design

What this is and why it exists

After minimizing gates one function at a time, this unit hands you the standard building blocks — adders, code converters, decoders, encoders, multiplexers, comparators — that every datapath on earth is assembled from. The unit's quiet revelation is that structure and function are interchangeable: a decoder or a multiplexer, plus wiring, implements ANY Boolean function. Once you see that, hardware stops being a bag of parts and becomes a currency exchange.

The vocabulary

• Half and full adder — one-bit addition without and with a carry input; chain full adders and you have a ripple-carry adder.
• Code converter — combinational translation between encodings: binary to Gray, BCD to excess-3, BCD to seven-segment.
• Decoder — n inputs select exactly one of 2-to-the-n outputs; a minterm generator by construction.
• Encoder and priority encoder — the reverse mapping; the priority version answers sanely when several inputs assert at once.
• Multiplexer (mux) — select lines choose which data input reaches the single output; a wired truth table.
• Demultiplexer — one input routed to a selected output; the same silicon as a decoder with an enable.
• Magnitude comparator — outputs for greater, equal and less across two binary words.

The mental model

A decoder is a minterm factory: for every input combination, exactly one output line goes active — output seven IS minterm seven. Any function in canonical SOP form is therefore a decoder plus one OR gate collecting the minterms the function contains. A multiplexer is the same idea inverted — a truth table cast in metal: the select lines are the input variables, and whatever you wire to data input k is the function's value on row k. Wire constants and you implement any n-variable function with a 2-to-the-n mux; wire the last variable (or its inverse) instead of constants and half the mux disappears. These two constructions matter beyond the exam because they reveal the exchange rate between hardware shapes — the same function can be gates, a decoder network, or a mux tree, chosen by cost, speed and what is lying in the parts bin.

The adder family shows structure driving performance. A full adder handles one column; rippling the carry through n of them is compact but slow — the carry may traverse the entire word, and that worst-case path sets the clock. One XOR trick upgrades the adder: sums with a control line that conditionally inverts B (and injects a carry of one) add when the control is low and subtract in two's complement when high — one circuit, both operations, which is the seed of every arithmetic-logic unit.

Priority encoders introduce arbitration: inputs can conflict, and hardware must rank them — the highest-priority active input wins and the rest wait. That theme returns in interrupt controllers and bus arbiters; this small block is where it is first met. Code converters, K-map exercises in themselves, earn their keep at boundaries: Gray code where a value crosses clock domains or a mechanical sensor (one bit changes per step, so a misread is off by one, never wild), seven-segment where a number meets a human.

What you should now be able to explain or do

Build and explain a ripple-carry adder-subtractor with the XOR control trick. Implement a given function two ways: decoder-plus-OR and mux-with-wired-inputs. Explain what makes the priority encoder's answer well-defined under conflict. Say where Gray code earns its place and why.

Check yourself