OE-10.2 MOS & CMOS Circuit Design Process

What this is and why it exists

Stick diagrams are the sketch between a circuit schematic and a full layout. They capture topology and relative placement without committing to dimensions, which makes them the fastest way to think about area.

That middle step is the useful idea here. Jumping straight from schematic to layout means making a hundred placement decisions while also making a hundred dimensional ones.

And the design rules are expressed in a scalable unit for a reason worth knowing. A design can then move to a different process without being redrawn.

The vocabulary

• Well — a region of opposite doping, holding one type of transistor.
• N-well process — one well type, in a substrate of the other kind.
• Twin-tub process — both well types, each optimised separately.
• Layer — one of the materials a chip is built from, drawn as one colour.
• Stick diagram — a colour-coded sketch of topology without dimensions.
• Design rule — a minimum width or spacing the process can reliably make.
• Scalable unit — a length unit design rules are expressed in, so the design can shrink.
• Layout — the final dimensioned drawing sent for manufacture.

The mental model

Both kinds of transistor must sit on one piece of silicon, and each needs its own kind of substrate underneath. A well is the region of opposite doping that provides it. One well type in a substrate of the other is the simplest arrangement. Two well types, a twin-tub process, costs more steps and lets each transistor type be optimised on its own. That is why it exists despite the cost.

The layers are the materials the chip is built from, drawn as separate colours. Learning to read a layout is largely learning what each colour is, and what happens where two of them overlap. A particular overlap *is* a transistor. Recognising that is the moment layouts stop looking like abstract art.

Stick diagrams then let you think about arrangement before dimension. Colour-coded lines for each layer, showing what connects to what and what sits beside what. Because nothing is to scale, you can rearrange freely, and area problems show up as crossings and detours rather than as numbers. Get the topology right here and the layout becomes transcription.

Design rules are the manufacturing reality: the minimum widths and spacings the process can reliably produce. Violate one and the chip may be drawn correctly and still not work when made.

Expressing them in a scalable unit rather than in absolute measurements is the elegant part. State every rule as a multiple of one length parameter. Shrinking to a newer process then means changing that parameter rather than redrawing everything. It is not a perfect scaling. Physics stops cooperating at small sizes, and effects that were negligible stop being so. It still made a generation of designs portable.

What you should now be able to explain or do

Say why wells exist and what a twin-tub process buys for its extra cost. Read a layout by layer, and recognise the overlap that forms a transistor. Draw a stick diagram and use it to think about area before dimensions. Say why design rules exist and what violating one costs. Explain why rules are written in a scalable unit, and say where that scaling stops working.

Check yourself