EC-9.3 Interrupts, Timers and Keeping Time
You can decide when polling is no longer enough, write a handler that does only what a handler may do, reason about priority and latency, and set a timer to produce a period, an interval measurement or a pulse of a chosen width.
Before:S5-2. Computer Architecture and MicroprocessorsEC-7. Signals and SystemsUnlocks:PE1-4. Embedded C ProgrammingEC-13. Laboratory Practice, in Sequence
A small machine spends most of its life waiting, and how it waits is what separates a design that responds in time from one that misses things under load. Timers and interrupts are also where the first genuinely hard bugs appear, because the code that fails is not the code that was running when it failed.
Work through these
Polling, and when it stops being enough
Checking a flag in a loop is simple and predictable, and it works until the loop has other work. The moment the longest path through the loop exceeds the time you have to respond, polling has failed.
NPTEL: Embedded Systems Design (IIT Kharagpur) · CourseThe interrupt, from signal to vector to handler
Hardware raises a request, the processor finishes the current instruction, saves enough state to return, looks up an address in a table and starts running there. The table entry is the vector, and getting it wrong is a silent failure.
NPTEL: Embedded System Design with ARM (IIT Kharagpur) · CourseWhat a handler may and may not do
A handler runs while the rest of the program is stopped, so it should set a flag, move a byte and return. Long work, waiting for anything, or calling into code that is not written to be re-entered all belong outside it.
NPTEL: Embedded Systems Design (IIT Kharagpur) · CoursePriority, nesting and latency
Latency is the delay from the event to the first instruction of your handler, and it grows whenever a higher-priority handler is already running. Allowing nesting lowers latency for urgent sources and complicates everything else.
NPTEL: Embedded System Design with ARM (IIT Kharagpur) · CourseThe timer as a counter, and the prescaler
A timer counts clock edges and signals when it reaches a limit. The prescaler divides the clock first, and choosing a prescaler and a limit together is how you get a period the counter can actually reach.
NPTEL: Microcontrollers and Applications (IIT Kanpur) · CourseOutput compare, input capture and pulse width modulation
Output compare changes a pin when the count reaches a value, input capture records the count when a pin changes, and the two together measure intervals and generate pulses without the processor watching.
NPTEL: Microcontrollers and Applications (IIT Kanpur) · Course
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