core Estimated learning time: 9 h

S5-3.5 DSP Processors

You can explain why DSP processors differ from general purpose ones and describe the TMS320C67XX architecture, functional units, pipelining, registers and its linear and circular addressing modes.

A DSP processor is a general purpose processor bent towards one inner loop: multiply, accumulate, fetch the next sample, repeat. Circular addressing is the clearest example of that bending - a delay line needs a wrap-around buffer, so the hardware provides one and saves the pointer arithmetic every single sample. Once you see the architecture as filter-shaped, the separate data buses, the MAC unit and the deep pipeline all read as consequences rather than a list of features.

Work through these

  • Introduction to DSP processors and the need for them

    Why a general purpose processor is the wrong shape for this work, stated before any architecture. Keep the inner loop in mind: multiply, accumulate, fetch the next sample, repeat.

  • Difference between DSP and general purpose processor architectures

    The comparison that explains every feature in the rest of the topic. Once you see the architecture as filter shaped, the separate buses and the multiply accumulate unit read as consequences rather than a list.

  • TMS320C67XX architecture

    One concrete processor to anchor the ideas. Treat it as an example of the class rather than a device to memorise.

  • Functional units

    What the processor can do at once, which is where its throughput actually comes from. It connects directly to the pipelining item below.

  • Pipelining

    Deep pipelines are how the clock rate is reached, and they are also why the programming model has awkward edges. The same idea as in the computer architecture subject, pushed further.

  • Registers

    What the machine has to work with, which sets how much of a filter can stay in registers. Dry, and it decides real performance.

  • Linear and circular addressing modes

    The clearest example of the architecture being bent towards one job: a delay line needs a wrap around buffer, so the hardware provides one and saves the pointer arithmetic on every single sample.

  • Lab: study the procedure to work in real time on the DSK with Code Composer Studio

    The bench version, and the setup step everything else depends on. Getting the toolchain running in real time is the part that costs a session if it is left to the last minute.

  • Lab: implement Dual Tone Multi Frequency (DTMF) generation on the DSK

    A small, complete, audible project. Tone generation is a good first thing to build because you can hear immediately whether it is right.

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Links last checked 30 Aug 2026.

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