EC-13.4 Digital and Programmable Hardware on the Bench
You can bring up a digital circuit, use a logic analyser to see what is actually happening on several lines at once, take a design through simulation and then onto programmable hardware, and diagnose a timing problem rather than guessing at it.
Before:S4-1. Analog CircuitsEC-8. Measurements, Instrumentation and Experimental MethodEC-9. Microcontrollers and Embedded SystemsEC-19. Introduction to Electronics, Design and MakingUnlocks:EC-14. Engineering Design and System IntegrationEC-16. Ethics, Safety, Sustainability and Standards
Digital work has a laboratory failure mode of its own: the circuit is either right or completely wrong, with none of the graded misbehaviour that makes an analog fault readable. That makes the instruments and the method more important rather than less, and it is why this stage is about seeing what is happening rather than about designing anything new.
Work through these
Bringing up a digital board in a defined order
Supply, then clock, then reset, then anything else. Checking each in turn on an oscilloscope before moving to the next isolates a whole class of faults that otherwise look like a broken design.
NPTEL: Digital Electronic Circuits (IIT Kharagpur) · CourseWatching several lines at once with a logic analyser
Digital faults are relationships between signals rather than properties of one. Capturing eight lines together and reading their order is what makes a state machine's actual behaviour visible.
NPTEL: Digital Electronic Circuits (IIT Kharagpur) · CourseSimulate first, then program the hardware
A simulation that fails costs seconds; a hardware fault costs a session to find. Running a testbench before programming is the single largest saving of time available in digital work.
NPTEL: Digital Electronic Circuits (IIT Kharagpur) · CourseConstraints, and why a design that simulates can still fail
Simulation assumes ideal timing; real hardware has propagation delays and setup requirements. Reading the timing report the tools produce is what tells you whether a design will actually meet its clock.
NPTEL: Digital Electronic Circuits (IIT Kharagpur) · CourseGlitches, metastability and signals that are neither
A signal sampled while it is changing can be read as either value or as neither for a while. Synchronising every external input through two flip-flops is the standard remedy and is worth doing once deliberately.
NPTEL: Digital Electronic Circuits (IIT Kharagpur) · CourseDiagnosing rather than reprogramming at random
The temptation with programmable hardware is to change something and try again. Capturing the failing behaviour first, and forming a hypothesis about which signal is wrong, is faster and it teaches you the design.
NPTEL: Digital Electronic Circuits (IIT Kharagpur) · Course
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