OE-10.3 CMOS Logic Circuit Design

Work through these

• Design of MOS inverters with different loads

  The simplest logic circuit, built several ways depending on what the load is. Comparing the loads shows why the complementary approach in the next item won.

• The CMOS inverter and its transfer characteristic

  The circuit the whole industry is built on, and its response curve. The switching threshold and the noise margins read straight off that curve.

• CMOS NAND and NOR gates

  The two basic gates, and the series and parallel arrangements that create them. Once you see the pattern, any simple gate follows.

• AOI and OAI gates in CMOS

  Combining logic into a single gate rather than cascading, which is cheaper and faster. It is the first real optimisation in this subject.

• Transmission gate logic circuits

  Logic built from switches rather than gates, which is compact and has its own hazards. It reappears in the memory cells of the next topic.

  NPTEL: VLSI Circuits · Course

• The BiCMOS inverter

  Combining two device families to get the drive strength of one and the low power of the other. Historically important and now mostly a lesson in trade-offs.

• D flip-flop using transmission gates

  A storage element built from the switches above, which is where combinational design becomes sequential. It is the bridge to the memory topic.