S5-2.5 The 8086 Microprocessor
Standard computer-architecture theory and the published 8086 architecture — written September 2026
What this is and why it exists
Nobody builds new products with the 8086. It is studied because the processors in most laptops are still its descendants, and they still carry its decisions as visible ancestry.
Studying it turns the general ideas of the earlier topics into one concrete machine you can hold in your head.
The vocabulary
- Bus interface unit — the part that fetches instructions and moves data to and from memory.
- Execution unit — the part that decodes and carries out instructions.
- Instruction queue — the small buffer of instruction bytes fetched ahead of time.
- Flag register — the bits recording the result of the last operation.
- Segment register — a register holding the base of a region of memory.
- Offset — the distance of an address from that base.
- Segmented memory model — addresses formed from a segment base and an offset.
- Minimum and maximum mode — two wiring arrangements, for a small system and for one with other processors on the bus.
- Real mode — the original addressing behaviour, with no protection between programs.
- Protected mode — the later mode that isolates programs from one another.
The mental model
The internal split is the feature to notice first. The bus interface unit fetches ahead and fills an instruction queue. The execution unit takes bytes from that buffer and carries them out. So fetching and executing happen at the same time, which is an early and simple form of the pipelining idea from an earlier topic. When a jump is taken, the buffered bytes are wrong and are thrown away, which is that topic's hazard appearing in a real machine.
The flag register is small and used constantly. Each bit records something about the last operation. Was the result zero? Was it negative? Did it carry out of the top, or overflow? Every conditional jump reads these bits. Nothing else in the machine is consulted as often.
Segmentation is the concept to get straight, and it is the one students find awkward. The machine has sixteen-bit registers but a twenty-bit address. Twenty bits address one megabyte, and sixteen bits address only sixty-four kilobytes. So an address is built from two registers. A segment register supplies a base, shifted up by four bit positions, and an offset is added to it. That gives a twenty-bit address from two sixteen-bit values.
It is an awkward answer, and it is an answer to a real constraint. Knowing the constraint is what makes the awkwardness make sense. It also explains a consequence worth noticing: the same physical address can be written as many different segment and offset pairs.
Addressing modes here are the earlier general list made specific. Comparing the two lists is a quick way to see what is general to all machines and what was one designer's choice. Treat the instruction set the same way. Aim to recognise the shape of an instruction rather than to recall every mnemonic.
The signal descriptions under minimum and maximum mode are the pin-level view. Minimum mode wires a small system where this processor owns the bus. Maximum mode adds a controller so that other processors can share it. The section is dry, and it is where the processor meets an actual board. Skim it for the shape and return when a hardware detail needs settling.
The line then grows up. Registers get wider and the address space grows with them. The change that lasted is protected mode. In real mode any program can reach any address, so one faulty program can destroy another. Protected mode adds hardware checks on every access, so the operating system can isolate programs from each other. Every operating system since depends on that, which makes it the item of lasting significance in this topic.
The Pentium line is where the earlier architecture techniques appear in a shipping product. It has deeper pipelines, caches on the chip, and more than one instruction issued per cycle. It is a good place to notice how much of this subject is still in use.
What you should now be able to explain or do
Describe the split between the bus interface unit and the execution unit, and relate it to pipelining. Say what each flag records and which instructions read them. Form a twenty-bit physical address from a segment and an offset, and explain why the scheme exists. Compare this machine's addressing modes with the general list. State what protected mode added and why it mattered.
Check yourself
Why does the 8086 fetch instruction bytes before it needs them?
So fetching and executing overlap. The bus interface unit fills a buffer while the execution unit works on earlier instructions.
A jump is taken. What happens to the buffered instruction bytes?
They are discarded. They came from the path not taken, so the buffer must be refilled from the new address.
How is a twenty-bit address built from sixteen-bit registers?
The segment register is shifted up by four bit positions to give a base, and the offset is added to it.
Why can one physical address have many segment and offset pairs?
Because only the sum matters. Lowering the segment base and raising the offset by the matching amount reaches the same address.
What did protected mode add, and why does it still matter?
Hardware checks on every memory access, so one program cannot reach another's memory. Every operating system since has depended on that isolation.
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