core Estimated learning time: 9 hCommon in syllabi

Included in at least one reviewed higher-education syllabus.

S4-1.2 JFET Biasing & Amplifiers

You can bias a JFET, explain zero-current-drift biasing, and analyse CS/CD/CG amplifiers with the small-signal model.

Field-effect transistors retell the BJT story with a voltage-controlled device, and this topic covers JFET biasing, the zero-current-drift arrangement, and the common-source, common-drain and common-gate amplifiers through the small-signal model. It sits right after the BJT work so the parallels carry the load: CS, CD and CG mirror CE, CC and CB. The trap is assuming the biasing is easier because the model is simpler — JFET parameters spread widely between individual parts, which is exactly why the drift-free bias point is worth the algebra.

Work through these

  • Fixed bias, self-bias and voltage-divider bias for JFETs

    The same three biasing ideas from the BJT unit, redone for a device controlled by voltage rather than current. Self-bias is the FET workhorse, and the reason biasing is harder here is that the same part number varies widely from one chip to the next.

  • FET biasing for zero current drift

    There is a specific bias point at which a JFET's drain current barely moves as temperature changes, and finding it is a standard piece of design arithmetic. It is a favourite examination question and also the item that shows why temperature stability is a real engineering worry.

  • CS, CD, CG amplifiers via small-signal model

    Common source, common drain and common gate are the FET counterparts of the three BJT arrangements, analysed with a small-signal model that is lighter than h-parameters. Lean on the parallel and most of the work is already done.

  • Compare the three FET configurations

    Setting the three FET arrangements side by side on gain, input impedance and output impedance. The comparison is what you actually carry forward, since choosing a configuration is a routine decision and re-deriving each one is not.

  • Frequency response of FET amplifiers

    As with the BJT, gain falls away at both ends of the frequency range, and the causes are the coupling network at the low end and device capacitance at the high end. Worth doing carefully here because the same reasoning returns in every amplifier you meet.

  • Lab: simulate a CS amplifier and verify gain against hand analysis

    Simulate a common-source amplifier and check the measured gain against what your small-signal analysis predicted. The gap between the two is where the assumptions in the model become visible.

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Links last checked 29 Aug 2026.

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